`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2022/06/23 19:51:19
// Design Name: 
// Module Name: NPC
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module NPC(
    input rst,
    input [31:0] pc,
    input [31:0] imm,
    input [1:0] npc_sel,
    input [31:0]  alu_c,
    output [31:0] npc,
    output [31:0] pc4
    );

reg [31:0] dout;
assign pc4 = pc + 4;
assign npc = dout;

always @(*)
begin
    if (rst)
        dout = 0;
    else
        case (npc_sel)
            2'b00:      dout = pc4;
            2'b01:      dout = pc + imm;
            2'b10:      dout = alu_c;
            default:    dout = pc;
        endcase
end

endmodule
